APA (7th ed.) Citation
(2016). A Cache System Design for CMPs with Built-In Coherence Verification. VLSI Design.
Chicago Style (17th ed.) Citation
"A Cache System Design for CMPs with Built-In Coherence Verification." VLSI Design 2016.
MLA (9th ed.) Citation
"A Cache System Design for CMPs with Built-In Coherence Verification." VLSI Design, 2016.
Warning: These citations may not always be 100% accurate.