Full Text Available

Note: Clicking the button above will open the full text document at the original institutional repository in a new window.

Firmware Design and Testing for Data Handling and Control of Time Delay Integration Image Sensors in an Earth Observation Payload

Earth observation is becoming more and more important in this age of information. It provides critical information in every field of work be it military, scientific research, disaster management, urban planning and many others. Better planning in all these fields is possible with more detailed infor...

Full description

Saved in:
Bibliographic Details
Main Author: Ahmed, Muhammad Ebtisam
Other Authors: Martinez, Peter
Format: Thesis
Language:English
Published: Department of Electrical Engineering 2023
Subjects:
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Earth observation is becoming more and more important in this age of information. It provides critical information in every field of work be it military, scientific research, disaster management, urban planning and many others. Better planning in all these fields is possible with more detailed information which translates to a requirement of high-resolution Earth observation data. These high-resolution images tend to generate a lot of data which needs to be processed in a very short time. This high data rate problem is the focus of this work. This work tries to tackle this problem in two ways. Firstly, a Time Delay Integration (TDI) image Sensor is used which drastically improves image Signal to Noise Ratio (SNR) and decreases the amount of data generated. Secondly, an FPGA is used for data handling and processing of this generated data. The large number and high bandwidth of FPGA inputs/outputs enables it to handle huge data generated. Functional analysis and requirements of firmware design will be analyzed based on previous works addressing a similar problem. Based on that, requirements will be proposed. The firmware design of the FPGA is proposed, which drives firmware architecture. This architecture serves as a guideline for detailed firmware design which will be done in VHDL. This firmware design will be tested as per requirements and presented in this work.