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A reconfigurable accelerator card for high performance computing
Includes abstract.
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| Main Author: | |
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| Other Authors: | |
| Format: | Thesis |
| Language: | English |
| Published: |
Department of Electrical Engineering
2014
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| _version_ | 1867611331130032128 |
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| access_status_str | Open Access |
| author | Aitken, Michael James |
| author2 | Inggs, Michael |
| author_browse | Aitken, Michael James Inggs, Michael |
| author_facet | Inggs, Michael Aitken, Michael James |
| author_sort | Aitken, Michael James |
| collection | Thesis |
| description | Includes abstract. |
| format | Thesis |
| id | oai:open.uct.ac.za:11427/5234 |
| institution | University of Cape Town (South Africa) |
| language | eng |
| license_str | Not specified — see source repository |
| provenance_str_mv | Harvested via OAI-PMH from UCTD — University of Cape Town Open Access Repository |
| publishDate | 2014 |
| publishDateRange | 2014 |
| publishDateSort | 2014 |
| publisher | Department of Electrical Engineering |
| publisherStr | Department of Electrical Engineering |
| record_format | dspace |
| source_str | UCTD — University of Cape Town Open Access Repository |
| spelling | oai:open.uct.ac.za:11427/5234 A reconfigurable accelerator card for high performance computing Aitken, Michael James Inggs, Michael Langman, Alan Electrical Engineering Includes abstract. Includes bibliographical references (leaves 68-70). This thesis describes the design, implementation, and testing of a reconfigurable accelerator card. The goal of the project was to provide a hardware platform for future students to carry out research into reconfigurable computing. Our accelerator design is an expansion card for a traditional Von Neumann host machine, and contains two field-programmable gate arrays. By inserting the card into a host machine, intrinsically parallel processing tasks can be exported to the FPGAs. This is similar to the way in which video game rendering tasks can be exported to the GFC on a graphics accelerator. We show how an FPGA is a suitable processing element, in terms of performance per watt, for many computing tasks. We set out to design and build a reconfigurable card that harnessed the latest FPGAs and fastest available I/O interfaces. The resultant design is one which can run within a host machine, in an array of host machines, or as a stand-alone processing node. 2014-07-31T10:59:54Z 2014-07-31T10:59:54Z 2008 Master Thesis Masters MSc http://hdl.handle.net/11427/5234 eng application/pdf Department of Electrical Engineering Faculty of Engineering and the Built Environment University of Cape Town |
| spellingShingle | Electrical Engineering Aitken, Michael James A reconfigurable accelerator card for high performance computing |
| thesis_degree_str | Master's |
| title | A reconfigurable accelerator card for high performance computing |
| title_full | A reconfigurable accelerator card for high performance computing |
| title_fullStr | A reconfigurable accelerator card for high performance computing |
| title_full_unstemmed | A reconfigurable accelerator card for high performance computing |
| title_short | A reconfigurable accelerator card for high performance computing |
| title_sort | reconfigurable accelerator card for high performance computing |
| topic | Electrical Engineering |
| url | http://hdl.handle.net/11427/5234 |
| work_keys_str_mv | AT aitkenmichaeljames areconfigurableacceleratorcardforhighperformancecomputing AT aitkenmichaeljames reconfigurableacceleratorcardforhighperformancecomputing |