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Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths

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Published in:IEEE Access
Format: Online Article RSS Article
Published: 2026
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container_title IEEE Access
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discipline_display Computer Sciience
discipline_facet Computer Sciience
format Online Article
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genre Journal Article
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institution FRELIP
journal_source_facet IEEE Access
publishDate 2026
publishDateSort 2026
record_format rss_article
spellingShingle Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
Computer Sciience
General
Computer Sciience
sub_discipline_display General
sub_discipline_facet General
subject_display Computer Sciience
General
Computer Sciience
Computer Sciience
General
Computer Sciience
subject_facet Computer Sciience
General
Computer Sciience
title Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_auth Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_full Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_fullStr Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_full_unstemmed Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_short Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_sort measurement-based parasitic inductance network identification for multichip power modules based on inductance matrix of loop wiring paths
topic Computer Sciience
General
Computer Sciience
url http://ieeexplore.ieee.org/document/11538136